Pragmatic solution for parasitic-immune design of electronics ICs for automotive

Smart Power ICs are extensively used in automotive embedded systems due to their unique capabilities to merge low power and high voltage devices on the same chip, at competitive cost. In such devices, induced electrical coupling noise due to switching of the power stages when integrating such high voltage (HV) devices with low voltage (LV) functions, is a big issue. The lack for a model strategy that would enable the accurate simulation of the injection of minority carriers in the substrate as part of the HV model, as well as its propagation in the substrate is one of the main reasons for this critical situation. This picture motivates the project proposal where all these aspects are addressed to create a link between circuit design, modelling and implementation in innovative computer aided design tools. This concerns smart power IC’s dedicated to automotive applications requiring cointegration of high voltage power stages with low voltage analog/digital blocks on the same chip, still being reliable when operating at high temperature.

  • Framework: FP7
  • Type: IP
  • Status: Ongoing
  • Ongoing Date: 31 Aug 2015
  • Vehicles: Passenger cars
  • Technology fields: Drive Train Technologies, Vehicle Systems Integration,
  • Project Partners: AdMOS (Germany), Austriamicrosystems (Austria), CNRS LAAS (France), Continental Automotive France SAS (France), Ecole Polytechnique fédérale de Lausanne (Switzerland), STMicroelectronics (Italy), Université Pierre et Marie Curie LIP6 (France), Valeo S.A. (France),
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